IBIS Macromodel Task Group

Meeting date: 15 October 2013

Members (asterisk for those attending):
Agilent:                    * Fangyi Rao
                            * Radek Biernacki
Altera:                     * David Banas
                              Julia Liu
                              Hazlina Ramly
Andrew Joy Consulting:        Andy Joy
ANSYS:                        Samuel Mertens
                            * Dan Dvorscak
                            * Curtis Clark
                              Steve Pytel
                              Luis Armenta
Arrow Electronics:            Ian Dodd
Cadence Design Systems:       Terry Jernberg
                            * Ambrish Varma
                              Feras Al-Hawari
                            * Brad Brim
                              Kumar Keshavan
                              Ken Willis
Cavium Networks:              Johann Nittmann
Celsionix:                    Kellee Crisafulli
Cisco Systems:                Ashwin Vasudevan
                              Syed Huq
Ericsson:                     Anders Ekholm
IBM:                          Greg Edlund
Intel:                        Michael Mirmak
Maxim Integrated Products:    Mahbubul Bari
                              Hassan Rafat
                              Ron Olisar
Mentor Graphics:            * John Angulo
                              Zhen Mu
                            * Arpad Muranyi
                              Vladimir Dmitriev-Zdorov
Micron Technology:          * Randy Wolff
                            * Justin Butterfield
NetLogic Microsystems:        Ryan Couts
Nokia-Siemens Networks:       Eckhard Lenski
QLogic Corp.                  James Zhou
SiSoft:                     * Walter Katz
                              Todd Westerhoff
                              Doug Burns
                            * Mike LaBonte
Snowbush IP:                  Marcus Van Ierssel
ST Micro:                     Syed Sadeghi
Teraspeed Consulting Group:   Scott McMorrow
                            * Bob Ross
TI:                           Casey Morrison
                              Alfred Chong
Vitesse Semiconductor:        Eric Sweetman
Xilinx:                       Mustansir Fanaswalla
                              Ray Anderson

The meeting was led by Arpad Muranyi

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Opens:

- None

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Call for patent disclosure:

- None

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Review of ARs:

- Walter create EMD vs. BIRD 145 example
  - Done

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New Discussion:

Walter showed a BIRD 145/160 IBIS example
- Walter: A basic difference is the use of MODELCALL instead of model name.
  - The assumption of one-to-one mapping of pin to die pad is not good for power networks
  - In the Ports section Pin_name is the same as IBIS Pin Number.
- Arpad: What does Pin_name mean in Buffer entries?
- Walter: It denotes a buffer instance.
- Radek: Is Terminal syntactically required in the Buffer leaf?
- Walter: Yes.
- Radek: Will the Pad leafs be extended someday?
- Walter: Other data will be needed when there is not one-to-one correspondence for power.
  - Then it will reference die pad names instead of pin names.
- Walter showed what a [Die Pad] section might look like.

- Walter: With BIRD 145 a DQ [Model Call] must be created.
  - Parsing and lookups are required to see what a pin is connected to.
- Arpad: The [Node Declarations] also provide names.
- Walter: The syntax is more spread out with BIRD 145.
  - With a memory controller at least 130 lines would be needed.
- Arpad: The EMD like example would have at least 96 extra lines.
  - Also it is shorter only because it has no on-die nodes.
- Radek: Walter's solution seems more compact.
  - What is the significance of the numbered leafs?
- Walter: They are the subckt terminal position.
  - They could have been left off and line order assumed to be terminal order.
  - But explicit numbering allows using only some terminals.
- John: How will we handle one-to-multiple mapping of pin to buffer?
- Walter described a way to handle stacked memory and agreed this should be resolved.
  - A pin.instance format could be used.
- John: A Stack leaf could be added instead.
- Walter: We just need some kind of handle to identify which buffer we are talking about.
  - This is like EMD, with names for internal instances.
- John: It would be good to avoid the BIRD 145 syntax.
  - But, it may solve the  multiple instance problem already.
- Walter: We have to ask which is easier for EDA tool parsing and debugging.

- Bob: Which EMD Like pin is the pullup reference?
- Walter: The one with Pu_Ref.
  - It is the internal pullup reference of the IBIS model.
- Arpad: The port numbers are defined by the subckt.

- Brad: How does this interact with the IBIS file?
- Walter: Somewhere in the IBIS there would be a keyword to introduce the on-die IBIS-ISS file.
  - Also there would be one to introduce the package IBIS-ISS file.
- Radek: We could look at what BIRD 125 has for that.
  - Calling it EMD probably adds confusion.
- Walter: We have to be careful to say "EMD Like"
- Brad: EMD instantiates the IBIS model.
  - I thought that would be proposed here.
  - As it stands this does not change the point of control.
- Brad: What if I have a separate RDL?
  - Can the package and on-die interconnect be grouped?
- Walter: I would like to see an example of that.
- Randy: RDL is on-die

- Arpad: Can circuits be cascaded?
- Brad: It can be
- Brad: If I have interposers and other connects does that need EMD?
- Walter: Yes
- John: It may be wise to look at the more involved cases now.
  - BIRD 145 seems more general, for example no one-to-one assumption
- Walter: That does assume one-to-one.
  - We should look at more examples.
  - I can create examples, but others need to explain what is needed.

AR: Arpad request people to create ideas for new interconnect examples

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IBIS Interconnect SPICE Wish List:

1) Simulator directives
